Hi @Jetson-Nano I have reviewed your schematic again and your layout files.
I cannot see any reason why your design will not work.
The only suggestion I have is to increase your capacitors here to 1uF:

But, otherwise, your layout is OK (some improvements can be made, but nothing is detrimental):
- Pin 1 correct on connector, socket, LDO, other ICs
- Vias are picking up planes correctly
- Voids where expected
- Generous copper trace thickness
The one issue I think I might have found is your reference designators do not match the schematic between the layout. So, I'm wondering if you are installing parts from the BOM in incorrect locations...
For example, the cap on the output of the LDO is "C6" in the layout, but "C7" in your schematic:

And, your resistors are also not in sync. R1 and R2 in the layout are for the Ic2 expander, but in the SCH, it is for your FLIR module and not R5/R6 as in the SCH:

and there are a few other examples. So, I just think perhaps your layout reference designators are not synced to your design.
J1 should be J2, and R3/R4 on the layout does not exist on the SCH.

So, maybe this is where your issue is. I'd recheck the annotation between SCH and Layout, and be sure you are installing all the correct parts in the correct places.
Hope this helped!
Keep us posted.
Thanks!